Design and Fabrication of an Implantable Cortical Semiconductor Integrated Circuit Electrode Array

Author

Pierre K. LeFevre

Date of Award

12-1990

Document Type

Thesis

Degree Name

Master of Science in Electrical Engineering

Department

Department of Electrical and Computer Engineering

First Advisor

Matthew Kabrisky, PhD

Abstract

This research furthered the processing steps of the AFIT 16 by 16 implantable cortical semiconductor integrated circuit electrode array, or brain chip. The areas of interest include the brain chip electron ics, metallization, ionic permeation, and implantation. The electronics and metallization are heavily covered. A high speed, single clock divide-by-two circuit was modified with a reset transistor and cascaded to form a ripple counter. This device had stable operation at specific source voltage and clock voltage and frequency. A 7-stage inverter with 10 unmodified divide-by-two circuits cascaded operated between 1.7 and 8 volts, and between 39 Khz and 1 Mhz, respectively. The metallization process refers to coating Au/Ni or Pt onto exposed aluminum areas (pads) of a CMOS integrated circuit. Sputtering was used to coat the chip. And an Au/Ni etchant or Pt peel-off technique was used. The Au/Ni etchant used was iodine, potassium iodide, and deionized water solution.

AFIT Designator

AFIT-GE-ENG-90D-34

DTIC Accession Number

ADA230676

Comments

The author's Vita page is omitted

Recommended Citation

LeFevre, Pierre K., "Design and Fabrication of an Implantable Cortical Semiconductor Integrated Circuit Electrode Array" (1990). Theses and Dissertations. 7963.
https://scholar.afit.edu/etd/7963