Date of Award

12-1991

Document Type

Thesis

Degree Name

Master of Science

Department

Department of Electrical and Computer Engineering

First Advisor

Edward S. Kolesar, Jr., PhD

Abstract

The purpose of this research effort was to investigate the feasibility of applying the silicon micromachining technique to thermal management as applied to integrated circuits and wafer scale integration techniques. Three silicon micromachined structures and an untextured reference wafer were compared as heat-dissipating surfaces. These four surfaces were realized using 3-inch diameter, single crystal silicon wafers. The following structures were micromachined in silicon wafers using wet chemical, anisotropic etching and photolithographic techniques: (1) randomly spaced and sized pyramids in (100)-oriented silicon, (2) deep vertical-wall grooves in (110)-oriented silicon, and (3) micro-fluid channels in (100)-oriented silicon. The heat- dissipating silicon wafers were epoxied to silicon wafers hosting heat-producing devices to realize a silicon wafer thermal module, simulating the wafer scale integration packaging technique. Two types of heat-producing devices were compared: (1) n-diffused integrated circuit die resistors, and (2) thin-film aluminum resistors. Two configurations of the integrated circuit die were also compared: (1) a single, centered, integrated circuit die and (2) four, centered, integrated circuit die.

AFIT Designator

AFIT-GE-ENG-91D-12

DTIC Accession Number

ADA243744

Comments

The author's Vita page is omitted.

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