Date of Award

12-1991

Document Type

Thesis

Degree Name

Master of Science

Department

Department of Electrical and Computer Engineering

First Advisor

Eric Christensen

Abstract

This thesis describes a method of parallelizing a battlefield discrete event simulation. The method combines elements of conservative time synchronization together with elements of optimistic computation and local rollback on a message passing hardware architecture. The battle simulation features aircraft moving in a battle area and launching missiles at enemy aircraft. Aircraft are randomly grouped into logical process (LPs), and a single LP is assigned to each processor. Aircraft state information is replicated across all LPs. Only the LP with the minimum next event time can execute safely. While one LP is executing safely all other LPs are precomputing their next event. When an LP does become safe to execute it can update its previous precomputation and broadcast the results to all other LPs. The sequential battlefield simulation has no battlefield partitions, and therefore the pros and cons of partitioning the battlefield in a conservative parallel implementation are discussed. Simulation speedup was achieved without battlefield partitioning and various simulation scenarios were run in order to investigate the impact of event interleaving among logical processes on simulation speedup.

AFIT Designator

AFIT-GCS-ENG-91D-23

DTIC Accession Number

ADA243752

Comments

The author's Vita page is omitted.

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