Document Type

Article

Publication Date

9-24-2012

Abstract

Electrical properties of p-Ge1−ySny (y = 0.06%) grown on n-Si substrate were investigated through temperature-dependent Hall-effect measurements. It was found that there exists a degenerate parallel conducting layer in Ge1−ySny/Si and a second, deeper acceptor in addition to a shallow acceptor. This parallel conducting layer dominates the electrical properties of the Ge1−ySny layer below 50 K and also significantly affects those properties at higher temperatures. Additionally, a conductivity type conversion from p to n was observed around 370 K for this sample. A two-layer conducting model was used to extract the carrier concentration and mobility of the Ge1−ySny layer alone.

Comments

© 2012 AIP Publishing LLC, published under an exclusive license with American Institute of Physics.

AFIT Scholar, as the repository of the Air Force Institute of Technology, furnishes the published Version of Record for this article in accordance with the sharing policy of the publisher, AIP Publishing. A 12-month embargo was observed.

This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. This article appeared in Applied Physics Letters 101: 131110 as fully cited below and may be found at DOI: 10.1063/1.4754625.

Source Publication

Applied Physics Letters

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