Date of Award
Master of Science
Department of Electrical and Computer Engineering
William C. Hobart Jr., PhD
A Parallel Discrete Event Simulation Coprocessor was designed for conservative synchronization protocols and was implemented in software using some of a parallel computer's nodes to act as coprocessors. The coprocessor was designed to offload synchronization overhead and next event queue management from the nodes running the simulation. The coprocessor was designed to accelerate simulations based on the Simulation Protocol Evaluation on a Concurrent Testbed with ReUsable Modules (SPECTRUM) environment. The research was conducted in three steps: the SPECTRUM environment was ported from an Intel iPSC-2 to an Intel Paragon XP-S, the coprocessor was designed and the simulations were timed, with and without the coprocessor. In some cases, the coprocessor provided up to a 2.5 times speedup.
DTIC Accession Number
Walton, Andrew C., "Minimizing the Impact of Synchronization Overhead in Parallel Discrete Event Simulations" (1994). Theses and Dissertations. 6397.