Date of Award


Document Type


Degree Name

Master of Science


Department of Electrical and Computer Engineering


This study investigated the development and use of analytic models for performance analysis of parallel discrete event battlefield simulation using conservative synchronization. A simulation architecture with layered application, simulation, and host machine services provided the model development basis. Simulation entities were modeled with set-theoretic definitions. Deterministic performance models using these definitions were developed for event prediction, scheduling, and execution in sequential battlefield simulation. The sequential model was expanded to include relative bounds for overhead factors introduced when the simulation is spatially decomposed for a parallel distributed memory machine. Comparison of sequential and parallel models instantiated for a simulation with uniform workload showed a potential for unbounded processor blocking. A synchronization algorithm modification to limit per-iteration blocking is shown theoretically to decrease finishing time. Modification results were demonstrated on a hypercube architecture. Demonstration showed that a sequential simulation requiring 60 seconds to run was limited to a best time of 30 seconds on four processors without algorithm modification. The time was improved to 17 seconds using the modification. A number of basic timing measurements also showed that event list operations on a sequential structure take significantly longer than interactive event prediction algorithms using simulation entities maintained in similar structures.

AFIT Designator


DTIC Accession Number



The author's Vita page is omitted.