Date of Award

12-2008

Document Type

Thesis

Degree Name

Master of Science in Electrical Engineering

Department

Department of Electrical and Computer Engineering

First Advisor

Rusty O. Baldwin, PhD

Abstract

Random number generators are used in many areas of engineering, computer science, most notably in simulations and cryptographic applications. There are true random number generators (TRNG) and pseudo random number generators (PRNG). Only a true random number generator is secure because the output bits are non-repeating and nonreproducible. As society has become more dependent on electronic technology the need for true random number generators has increased due to processes that require encryption in everyday use. A fast true random number generator on a field programmable gate array presents digital designers with the ability to have the generator on chip. Since random bits do not have to be brought into the processes from an outside source, they cannot be compromised. An oscillator sampling technique has proved to be an effective TRNG in a Xilinx FPGA. This research examines how the time of the differences in period of the two oscillators, the size of the jitter zone, and whether sampling on the rising and falling edge of the oscillator rather than just the rising edge affects the randomness of the TRNG. The proportion of the size of the jitter zone compared to the period difference between the two oscillators limits the performance of this technique. As the jitter zone gets larger, the proportion of the jitter zone to the difference in periods of the oscillators must increase for the output to remain random. Increasing the output rate by sampling on the rising and falling edge instead of only the rising was not effective. The output was random for only a jitter zone of 24 ps with a period difference of 50 ps and 100 ps.

AFIT Designator

AFIT-GE-ENG-08-01

DTIC Accession Number

ADA482856

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